The inclusion of nearly 1,000 times as many ADCs compared to the traditional column-parallel ADC architecture means an increased demand for current. Sony addressed this issue by developing a compact 14-bit A/D converter which is said to boast the industry's best performance in low-current operation. The FoM of the new ADC is 0.24e-・nJ/step. (power consumption x noise) / {no. of pixels x frame speed x 2^(ADC resolution)}.
The connection between each pixel on the top chip uses Cu-Cu connection, that Sony put into mass production as a world-first in January 2016.
Main Features:
- Low-current, compact pixel-parallel A/D converter
In order to curtail power consumption, the new converter uses comparators that operate with subthreshold currents, resulting in the low current, compact 14-bit ADC. This overcomes the issue of the increased demand for current due to the inclusion of nearly 1,000 times as many ADCs in comparison with the traditional column ADC. - Cu-Cu (copper-copper) connection
To achieve the parallel A/D conversion for all pixels, Sony has developed a technology which makes it possible to include approximately three million Cu-Cu (copper-copper) connections in one sensor. The Cu-Cu connection provides electrical continuity between the pixel and logic substrate, while securing space for implementing as many as 1.46 million A/D converters, the same number as the effective megapixels, as well as the digital memory. - High-speed data transfer construction
Sony has developed a new readout circuit to support the massively parallel digital signal transfer required in the A/D conversion process using 1.46 million A/D converters, making it possible to read and write all the pixel signals at high speed.
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