Is 3D stacking for CIS unnecessary?

A recent video from GalaxyCore discusses their single wafer CIS arguing against the need for 3D stacking for higher resolution:


GalaxyCore's innovative single-wafer, high-resolution CMOS image sensor solution solves the problem of incompatibility between logic circuits and pixel technology through FPPI process and unique circuit architecture. Without the need for stacking, this advancement reduces silicon usage while maintaining performance equivalent to stacked CIS. The world's first 32-megapixel single-wafer CIS is already in mass production, and the 50-megapixel CIS has also been unveiled.



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