Samsung presents "A 1/3-Inch 1.12μm-Pitch 13Mpixel CMOS Image Sensor with a Low-Power Readout Architecture" by Yunhong Kim, Heesung Chae, Kyung-Min Kim, Kyungtae Kim, Sukki Yoon, Kyoungmin Koh, Jesuk Lee, and Yongin Park at the 2020 IEEE International Symposium on Circuits and Systems (ISCAS) to be held virtually on October 10-21.
"This paper presents an implementation of a CMOS image sensor with a 65 nm CMOS process. The pixel array consists of 13 Mp with 1.12 μm pixel pitch. The fabricated sensor uses 10-bit column-parallel single slope analog-to-digital converters (ADC) based on a low-power readout architecture. Furthermore, a low-power built-in self-test (BIST) is proposed to avoid test over-kills. The proposed image sensor achieves a frame rate of 30–120 frames/s, a temporal random noise of 2 e − rms , a dynamic range of 65.2dB, peak integral non-linearity of 0.18 % and peak differential non-linearity of 0.26 least-significant bits. It consumes only 99.7mW at 30 frames/s."
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